1. Field of the Invention
The present invention relates to a modulation method and apparatus for the phase-locked loop, and more particularly, to a modulation method and apparatus with adjustable divisors of the dividers in the phase-locked loop.
2. Description of the Related Art
The technique of Phase-Locked Loop (PLL) has been developed since long time ago; yet it still plays a significant role because of its wide applications and potential for advancement. Many of its advantages are continuously improved and upgraded, such as increased frequency, improved stability, broadened bandwidth, and short locked-time, etc.
Briefly, the basic principle of the PLL operation is using an oscillating source with an extremely low frequency variance as a reference base to drive the operation of the variable frequency components through a feedback operation of the closed-loop control system, enabling those components to rapidly, continuously and stably operate in the same phase with the oscillating source. The operation mentioned above is well known as the phase-locked operation. When the internal circuit has reached the phase-locked state, the circuit can be used as a modulation/demodulation circuit for the communication system.
FIG. 1 schematically shows a circuit block diagram of a conventional PLL modulation circuit. The conventional PLL modulation circuit 100 comprises a modulator 110, a crystal oscillator 120, an R frequency divider 130, a PLL unit 140, a voltage controlled oscillator (VCO) 150 and an N frequency divider 160. In the conventional PLL modulation circuit 100 of FIG. 1, the modulator 110 is used to change the frequency of the crystal oscillator 120 so as to modulate RF (Radio Frequency) signals. However, such modulation method inevitably causes an effect similar to amplitude modulation (AM) on the oscillating signals, and then these signals are provided to the PLL unit 140 through the R frequency divider 130. Accordingly, the malfunction of the PLL occurs due to these incorrect signals.
FIG. 2 schematically shows another conventional PLL modulation circuit 200. The conventional PLL modulation circuit 200 comprises a modulator 210, a crystal oscillator 220, an R frequency divider 230, a PLL unit 240, a voltage controlled oscillator (VCO) 250 and an N frequency divider 260. In the PLL modulation circuit 200, a modulation signal required is directly provided to the control voltage terminal of the VCO 250 to execute a modulation effect. With such method, a longer phase-locked time is required to activate the circuit to reach the phase-locked state. In addition, the low pass loop filter inside the PLL is not suitable for the RF with lower data transfer rate.
Accordingly, in order to eliminate the shortcomings and limitations of the conventional PLL modulation circuit mentioned above, the present invention offers a modulation method and apparatus with adjustable divisors of the dividers in PLL, capable of providing a faster, more stable and accurate modulation.